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李远红
2026-04-09 10:14:20 +08:00
commit e325a77b42
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126
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/**
**************************************************************************
* @file at32a423_clock.c
* @brief system clock config program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32a423_clock.h"
/** @addtogroup AT32A423_periph_template
* @{
*/
/** @addtogroup 423_System_clock_configuration System_clock_configuration
* @{
*/
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* system clock (sclk) = (hext * pll_ns)/(pll_ms * pll_fr) / 2
* system clock source = HEXT_VALUE
* - lick = on
* - lext = off
* - hick = on
* - hext = off
* - hext = HEXT_VALUE
* - sclk = 64000000
* - ahbdiv = 1
* - ahbclk = 64000000
* - apb1div = 2
* - apb1clk = 32000000
* - apb2div = 1
* - apb2clk = 64000000
* - pll_ns = 64
* - pll_ms = 1
* - pll_fr = 4
* @param none
* @retval none
*/
void system_clock_config(void)
{
/* reset crm */
crm_reset();
/* config flash psr register */
flash_psr_set(FLASH_WAIT_CYCLE_3);
/* enable pwc periph clock */
crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
/* config ldo voltage */
pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V2);
/* enable hext */
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
/* wait till hext is ready */
while(crm_hext_stable_wait() == ERROR)
{
}
/* config pll clock resource
common frequency config list: pll source selected hick or hext(8mhz)
_____________________________________________________________________________
| | | | | | | | |
| sysclk | 150 | 144 | 120 | 108 | 96 | 72 | 36 |
|________|_________|_________|_________|_________|_________|_________________|
| | | | | | | | |
|pll_ns | 75 | 72 | 120 | 108 | 96 | 72 | 72 |
| | | | | | | | |
|pll_ms | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| | | | | | | | |
|pll_fr | FR_2 | FR_2 | FR_4 | FR_4 | FR_4 | FR_4 | FR_8 |
|________|_________|_________|_________|_________|_________|________|________|
if pll clock source selects hext with other frequency values, or configure pll to other
frequency values, please use the at32 new clock configuration tool for configuration. */
crm_pll_config(CRM_PLL_SOURCE_HEXT, 75, 1, CRM_PLL_FR_2);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
/* wait till pll is ready */
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
{
}
/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);
/* config apb2clk, the maximum frequency of APB2 clock is 150 MHz */
crm_apb2_div_set(CRM_APB2_DIV_1);
/* config apb1clk, the maximum frequency of APB1 clock is 120 MHz */
crm_apb1_div_set(CRM_APB1_DIV_1);
/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);
/* wait till pll is used as system clock source */
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
{
}
/* update system_core_clock global variable */
system_core_clock_update();
}

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/**
**************************************************************************
* @file at32a423_clock.h
* @brief header file of clock program
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32A423_CLOCK_H
#define __AT32A423_CLOCK_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32a423.h"
/* exported functions ------------------------------------------------------- */
void system_clock_config(void);
#ifdef __cplusplus
}
#endif
#endif

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/**
**************************************************************************
* @file at32a423_conf.h
* @brief at32a423 config header file
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32A423_CONF_H
#define __AT32A423_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup AT32A423_periph_template
* @{
*/
/** @addtogroup 423_Library_configuration Library_configuration
* @{
*/
/**
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
/* module define -------------------------------------------------------------*/
#define CRM_MODULE_ENABLED
#define TMR_MODULE_ENABLED
#define ERTC_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
#define USART_MODULE_ENABLED
#define PWC_MODULE_ENABLED
#define CAN_MODULE_ENABLED
#define ADC_MODULE_ENABLED
#define DAC_MODULE_ENABLED
#define SPI_MODULE_ENABLED
#define DMA_MODULE_ENABLED
#define DEBUG_MODULE_ENABLED
#define FLASH_MODULE_ENABLED
#define CRC_MODULE_ENABLED
#define WWDT_MODULE_ENABLED
#define WDT_MODULE_ENABLED
#define EXINT_MODULE_ENABLED
#define XMC_MODULE_ENABLED
#define USB_MODULE_ENABLED
#define ACC_MODULE_ENABLED
#define MISC_MODULE_ENABLED
#define SCFG_MODULE_ENABLED
/* includes ------------------------------------------------------------------*/
#ifdef CRM_MODULE_ENABLED
#include "at32a423_crm.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32a423_tmr.h"
#endif
#ifdef ERTC_MODULE_ENABLED
#include "at32a423_ertc.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32a423_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32a423_i2c.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32a423_usart.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32a423_pwc.h"
#endif
#ifdef CAN_MODULE_ENABLED
#include "at32a423_can.h"
#endif
#ifdef ADC_MODULE_ENABLED
#include "at32a423_adc.h"
#endif
#ifdef DAC_MODULE_ENABLED
#include "at32a423_dac.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32a423_spi.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32a423_dma.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32a423_debug.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32a423_flash.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32a423_crc.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32a423_wwdt.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32a423_wdt.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32a423_exint.h"
#endif
#ifdef XMC_MODULE_ENABLED
#include "at32a423_xmc.h"
#endif
#ifdef ACC_MODULE_ENABLED
#include "at32a423_acc.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32a423_misc.h"
#endif
#ifdef SCFG_MODULE_ENABLED
#include "at32a423_scfg.h"
#endif
#ifdef USB_MODULE_ENABLED
#include "at32a423_usb.h"
#endif
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif

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/**
**************************************************************************
* @file at32a423_int.c
* @brief main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32a423_int.h"
#include "mx_spi.h"
#include "sys.h"
extern __IO uint64_t g_system_tick;
/** @addtogroup AT32A423_periph_template
* @{
*/
/** @addtogroup 423_LED_toggle
* @{
*/
/**
* @brief this function handles nmi exception.
* @param none
* @retval none
*/
void NMI_Handler(void)
{
}
/**
* @brief this function handles hard fault exception.
* @param none
* @retval none
*/
void HardFault_Handler(void)
{
/* go to infinite loop when hard fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles memory manage exception.
* @param none
* @retval none
*/
void MemManage_Handler(void)
{
/* go to infinite loop when memory manage exception occurs */
while(1)
{
}
}
/**
* @brief this function handles bus fault exception.
* @param none
* @retval none
*/
void BusFault_Handler(void)
{
/* go to infinite loop when bus fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles usage fault exception.
* @param none
* @retval none
*/
void UsageFault_Handler(void)
{
/* go to infinite loop when usage fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles svcall exception.
* @param none
* @retval none
*/
void SVC_Handler(void)
{
}
/**
* @brief this function handles debug monitor exception.
* @param none
* @retval none
*/
void DebugMon_Handler(void)
{
}
/**
* @brief this function handles pendsv_handler exception.
* @param none
* @retval none
*/
void PendSV_Handler(void)
{
}
/**
* @brief this function handles systick handler.
* @param none
* @retval none
*/
void SysTick_Handler(void)
{
//System_TaskUpdate();
g_system_tick ++;
}
/**
* @}
*/
/**
* @}
*/

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/**
**************************************************************************
* @file at32a423_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
* Copyright notice & Disclaimer
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32A423_INT_H
#define __AT32A423_INT_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32a423.h"
/* exported types ------------------------------------------------------------*/
/* exported constants --------------------------------------------------------*/
/* exported macro ------------------------------------------------------------*/
/* exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif

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#include "sysconfig.h"
#include "at32a423.h"
#include "bsp_flash.h"
#include "app_get_json.h"
#include "string.h"
flash_para_struct g_flash_para;
json_data_struct g_json_data;
sys_config_struct g_sys_config;
sys_staus_struct g_sys_staus;
const sys_config_struct default_config =
{
.output_mode = 1,
.output_ax = 12,
.output_ay = 12,
.min_trigger_res_value = 3000,
.max_trigger_res_value = 40000,
.div_trigger_res =2700
};
int save_sys_config(sys_config_struct *sys_config)
{
g_flash_para.output_mode = sys_config->output_mode;
g_flash_para.output_ax = sys_config->output_ax;
g_flash_para.output_ay = sys_config->output_ay;
g_flash_para.min_trigger_res_value = sys_config->min_trigger_res_value;
g_flash_para.max_trigger_res_value = sys_config->max_trigger_res_value;
g_flash_para.div_trigger_res = sys_config->div_trigger_res;
return save_config_params(&g_flash_para);
}
void init_sys_config(sys_config_struct *sys_config)
{
//save_sys_config(&default_config);
if(load_config_params(&g_flash_para) != 1)
{
memcpy((uint8_t *)sys_config,(uint8_t *)&default_config,sizeof(sys_config_struct));
save_sys_config(sys_config);
return ;
}
if(g_flash_para.min_trigger_res_value == 0xffff)
{
sys_config->min_trigger_res_value = default_config.min_trigger_res_value;
}
else
{
sys_config->min_trigger_res_value = g_flash_para.min_trigger_res_value;
}
if(g_flash_para.max_trigger_res_value == 0xffff)
{
sys_config->max_trigger_res_value = default_config.max_trigger_res_value;
}
else
{
sys_config->max_trigger_res_value = g_flash_para.max_trigger_res_value;
}
if(g_flash_para.div_trigger_res == 0xffff)
{
sys_config->div_trigger_res = default_config.div_trigger_res;
}
else
{
sys_config->div_trigger_res = g_flash_para.div_trigger_res;
}
if(g_flash_para.output_mode > 1)
{
sys_config->output_mode = default_config.output_mode;
}
else
{
sys_config->output_mode = g_flash_para.output_mode;
}
}
//ץȡjson<6F><6E>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɹ<EFBFBD><C9B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD>
int cjson_get_sys_config(sys_config_struct *sys_config)
{
int result;
g_json_data.output_mode = sys_config->output_mode;
g_json_data.output_ax = sys_config->output_ax;
g_json_data.output_ay = sys_config->output_ay;
g_json_data.min_trigger_res_value = sys_config->min_trigger_res_value;
g_json_data.max_trigger_res_value = sys_config->max_trigger_res_value;
g_json_data.div_trigger_res = sys_config->div_trigger_res;
result = get_Json_data(&g_json_data);
if(result == 1){
memcpy(sys_config, &g_json_data, sizeof(sys_config_struct));
g_flash_para.output_mode=g_json_data.output_mode;
g_flash_para.output_ax=g_json_data.output_ax;
g_flash_para.output_ay=g_json_data.output_ay;
g_flash_para.min_trigger_res_value=g_json_data.min_trigger_res_value;
g_flash_para.max_trigger_res_value=g_json_data.max_trigger_res_value;
g_flash_para.div_trigger_res=g_json_data.div_trigger_res;
load_config_params(&g_flash_para);
}
return result;
}

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#ifndef _SYSCONFIG_H
#define _SYSCONFIG_H
#include "stdint.h"
#include "at32a423.h"
#include "bsp_flash.h"
#include "app_get_json.h"
#include "string.h"
typedef struct
{
uint16_t output_mode;
uint16_t output_ax;
uint16_t output_ay;
uint16_t min_trigger_res_value;
uint16_t max_trigger_res_value;
uint16_t div_trigger_res;
}sys_config_struct;
typedef struct
{
uint8_t lying_staus;
int row;
int col;
}sys_staus_struct;
extern sys_config_struct g_sys_config;
extern sys_staus_struct g_sys_staus;
extern flash_para_struct g_flash_para;
extern const sys_config_struct default_config;
void init_sys_config(sys_config_struct *sys_config);
int save_sys_config(sys_config_struct *sys_config);
int cjson_get_sys_config(sys_config_struct *sys_config);
#endif

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#include "systick.h"
__IO uint64_t g_system_tick = 0;
void systick_config(void)
{
/* setup systick timer for 1000Hz interrupts */
if(SysTick_Config( system_core_clock / 1000U)) {
/* capture error */
while(1) {
}
}
/* configure the systick handler priority */
NVIC_SetPriority(SysTick_IRQn, 0x00U);
}
uint64_t get_system_tick(void)
{
return g_system_tick;
}
void delay_us(uint32_t _us)
{
uint32_t ticks;
uint32_t told, tnow, tcnt = 0;
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD> = <20>ӳ<EFBFBD>΢<EFBFBD><CEA2><EFBFBD><EFBFBD> * ÿ΢<C3BF><CEA2><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
ticks = _us * (SystemCoreClock / 1000000);
// <20><>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0>SysTickֵ
told = SysTick->VAL;
while (1)
{
// <20>ظ<EFBFBD>ˢ<EFBFBD>»<EFBFBD>ȡ<EFBFBD><C8A1>ǰ<EFBFBD><C7B0>SysTickֵ
tnow = SysTick->VAL;
if (tnow != told)
{
if (tnow < told)
tcnt += told - tnow;
else
tcnt += SysTick->LOAD - tnow + told;
told = tnow;
// <20><><EFBFBD><EFBFBD><EFBFBD>ﵽ<EFBFBD><EFB5BD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˳<EFBFBD>ѭ<EFBFBD><D1AD>
if (tcnt >= ticks)
break;
}
}
}
void delay_ms(uint32_t _ms) { delay_us(_ms * 500); }

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#ifndef __SYSTICK_H
#define __SYSTICK_H
#include "at32a423.h"
void systick_config(void);
void delay_us(uint32_t _us);
void delay_ms(uint32_t _ms);
uint64_t get_system_tick(void);
#endif